This invention relates generally to telecommunication circuits and more particularly, it relates to a pseudoternary code transmitter for use in a digital subscriber controller device which permits a digital customer to obtain access and to transmit data across the S interface of the Integrated Services Digital Network.
In the field of telecommunications, use of digital signalling techniques in transmitting information over long distances is gaining more and more prominence for a wide range of communications, including voice, computer data and video data. Typically, the S or subscriber lines interface as referred to by the Consultative Committee for International Telegraphy and Telephony (CCITT) is used to interconnect ISDN terminal equipment (TE) such as a telephone or data generating equipment to one or more network terminators (NT) such as Private Automatic Branch Exchanges (PABX). In larger installations, the NT may be a PBX line card with multiple number of TE's connected thereto which is commonly referred to as a passive bus or multi-point configuration. In smaller installations, a single TE may be connected to an NT which is commonly referred to as a point-to-point configuration. A digital subscriber controller (DSC) device is used in the ISDN terminal equipment to communicate over the CCITT recommended "S" interface. Such a digital subscriber controller device is manufactured and sold by AMD, Inc., Sunnyvale, Calif., under their part No. Am79C30. The digital subscriber controller device is an integrated circuit formed of a single-chip package. As a part of the digital subscriber controller integrated circuit, there are provided transmitter circuitry which function to convert a binary digital signal into a pseudo-ternary signal that will conform to CCITT Recommendation I.430 which is described in a specification entitled "ISDN User-Network Interfaces: Layer 1 Recommendations" (Geneva Version-Rec. I.430, Apr. 8, 1986). The Rec. I.430 specification defines the electrical characteristics for TE's transmitter circuitry relative to output impedance for both marking and spacing conditions when power is applied and during power-down, output response for loading conditions of 50 ohm and 400 ohm templates, and current limiting for a load condition of a 5.6 ohm template.
In attempting to design a transmitter for meeting the electrical characteristics defined by the Recommendation I.430 specification, there was encountered initially the problem of line clamping during a power-down condition. This problem is inherent within any CMOS output structure due to the back-to-back p-n and n-p diode devices appearing at the outputs. There is illustrated schematically in FIG. 1(a) how these diode devices in the CMOS output stage interface with the twisted pair of transmission lines at the S interface when power is applied. FIG. 1(b) is an equivalent circuit for the CMOS output stage for a power-down condition, illustrating how the transmission line is shorted by the series diodes when V.sub.CC =V.sub.SS =0V.
Another problem encountered was to design a transmitter which included an accurate voltage source amplifier circuit for driving nominal loads of 50 to 400 ohms, but yet also provide a maximum current drive capability when low resistive loads (i.e., 5.6 ohms) appeared at the outputs. Finally, there was experienced the problem of designing a transmitter that would eliminate ringing on the transmission line caused by driving an inductive load with a high impedance source.
The transmitter circuitry of the present invention is provided as a part of the digital subscriber controller integrated circuit for performing such requirements relative to output impedance, output response and current limiting so as to overcome the problems associated with transmitter designs. This is achieved in the present invention by a pseudo-ternary code transmitter which includes a current source amplifier, a first voltage source amplifier, and a second voltage source amplifier. The current source amplifier serves to supply sufficient drive current to the voltage source amplifiers in order to maintain the proper differential voltage during the 50 and 400 ohm load conditions but yet supply a limited amount of current during the 5.6 ohm loading condition. Each of the voltage source amplifiers includes an output stage formed of a sourcing transistor and a sinking transistor. Linear I.C. charging circuits are provided to slowly turn off and on the sourcing and sinking transistors during mark-to-space and mark-to-mark transitions so as to reduce ringing on the transmission line. Further, the output stage is designed so as to provide a single n-p diode structure at an output node, thereby allowing the transmitter to be powered down without loading the transmission line when other terminal equipment is transmitting.